In the field of semiconductor devices the desire to achieve faster devices entails the fabrication of smaller and smaller devices. As device characteristics get smaller it becomes increasingly more important to control linewidth variation in lithographic patterning.
Linewidth variation, depending upon the severity, can cause a device to have poor performance or cause the device to fail altogether. For example, linewidth variation in the patterning of gate layers can cause the gate to be formed too large or too small. Larger gates slow down the semiconductor device such that the device has poor performance. Smaller gates are faster, however, if a gate is too small (i.e., smaller than required by the specific design characteristics) it may result in punch-through, which ultimately causes device failure. Linewidth variation may also cause or amplify alignment problems for semiconductor structures that require precise alignment in order to function properly, such as contact holes and implant layers.
As linewidths are decreased, the photolithography processing used to form the structure has a significant effect on linewidth variation. As illustrated in FIG. 1A, a metal layer 20 is formed on a substrate 10. A layer of photoresist 30 is formed on the metal layer 20 and a reticle 40, having a pattern corresponding to the structures to be formed, is placed in a stepper and aligned with respect to substrate 10. Light is then directed through reticle 40 exposing photoresist 30, which is subsequently developed to form a photoresist layer with openings corresponding to portions of metal layer 20 to be etched away. Etching is then conducted to form structures 51-54, as depicted in FIG. 1B. Disadvantageously, although all the structures 51-54 have the same design width (W.sub.des), their actual width W.sub.1 -W.sub.4 typically differ to a considerable extent. Such variations in linewidth ultimately leads to a reduction in circuit speed as designers intentionally increase the mean linewidth above the optimum linewidth to avoid yield loss resulting from linewidths below a lower limit based upon performance constraints at the expense of circuit speed and performance.
It is believed that a major factor causing such linewidth variation is the position of the structures relative to each other, known as "line density." Some lines, such as structures 52-54, are relatively closely spaced apart; e.g., less than about 1 micron, and are referred to as "dense lines." Other lines, such as structure 51, are relatively remote; e.g., greater than 1 micron, and are referred to as "isolated lines." Isolated lines tend to have different widths than dense lines formed at the same time. It is believed that this phenomenon occurs because interference occurs between neighboring patterns on reticle 40, affecting final linewidth when the dimensions of a neighboring line is of the order of the wavelength of light used during the photolithography process (i.e., the light used to expose photoresist 30). However, in the case of an isolated line, no such interference occurs. Referring again to FIG. 1B, an isolated structure such as 51 typically has a length W.sub.1 larger than the W.sub.2 -W.sub.4 of dense structures 52-54. In addition, structures 52 and 54 typically have lengths W.sub.2, W.sub.4, which are about equal, since their pattern density is the same. However, structure 53 typically has a length W.sub.3 less than W.sub.2 and W.sub.4.
Linewidth variation can be caused by many sources. One source, for example, is the optical proximity effect. The optical proximity effect causes systematic linewidth differences between "isolated" features and "dense" or "nested" features. The phrase "isolated features" is used to describe lines that are not in the presence of or are not surrounded by other lines with similar features are thus isolated. The phrase "nested features" is used to describe lines that are in the presence of or surrounded by other lines with similar features and are thus "nested" or "grouped." When isolated and nested features are patterned on the wafer using commercially available stepping or scanning microlithographic equipment, linewidth variance occurs even though the size of the isolated and nested features on the reticle are the same. There are several methods to reduce the optical proximity effect and improve linewidth control.
One method to improve linewidth control is to select a lithographic process that does not exhibit significant optical proximity effects, such as negative tone patterning. In negative tone patterning the portions of the resist exposed to light become insoluble. These insoluble portions remain behind and act as an etch mask to protect the underlying layer that will form the lines or gates being patterned. Although not well understood, it is a known empirical fact to those skilled in the art, that negative tone patterning exhibits a much smaller degree of optical proximity effects than positive tone patterning. The pattern media, i.e., "dark" field reticles and negative resist, used in negative tone patterning exhibit a much smaller degree of optical proximity effects than the more widely used pattern media, "clear" field reticle and positive resists, of positive tone patterning.
Although negative tone patterning is advantageous due to its lack of optical proximity effects, negative tone patterning also has many disadvantages that have made positive tone patterning more desirable for the last several generations of microphotolithography, for example, generations with device features below 1.50 microns. One such disadvantage is that negative resists tend to exhibit a mechanism known as swelling. That is, negative resists increase in volume, or "swell," as a result of penetration of the material by the developer solution. Such swelling causes the feature size of the pattern created in the resist to be altered. As an example, for design features smaller than 3 .mu.m, the change in feature size is unacceptably large compared to the specified dimensions. Positive resists do not exhibit swelling, due to a different dissolution mechanism during development of the resist, and are therefore desirable for design features smaller than 3 .mu.m.
Scumming effects are another disadvantage of negative resists. Scumming effects are caused when radiation, scattered off the projection optics, crosslinks a thin layer in the top surface of a negative resist and the thin layer becomes punctured and slides down between the features. As little as 1% scattered light has been observed to produce this unwanted mechanism in negative tone patterning. In positive tone patterning, such scattered light only results in a slight reduction of resist thickness, and no scumming effect is produced. As a result of swelling and scumming, there are no commercially available high performance negative tone resists for microlithographic patterning of the gate layers for the more recent generations of semiconductor devices. More recent generations of gate layers have dimensions, for example, below 0.8 .mu.m, and require exposure tools with an exposure wavelength of, for example, approximately 365 nm.
Another way to reduce linewidth differences caused by optical proximity effects is to increase the value of the exposure tool partial coherence (.sigma.) employed in positive tone patterning. Partial coherence (.sigma.) of the lithographic equipment is defined as the ratio of the illuminator numerical aperture to the numerical aperture of the projection optics. There is a complex relationship between the partial coherence of the exposure tool and the ability of the exposure tool to pattern and control the linewidth of minimal features of the different kinds of device layers over varying process conditions. The optimization of the partial coherence value for a given linewidth or pitch of a reticle is conventionally a time consuming endeavor. Common practice involves performing a series of experiments on each new reticle in order to optimize the partial coherence setting on the lithographic equipment for that particular reticle.
Thus, what is needed is a device and method that provides for the reduction of linewidth differences caused by optical proximity effects by optimizing the partial coherence value of the lithographic equipment in an efficient manner. The device and method should provide for the formation of semiconductor structures, such as interconnect lines or backend metal lines, active lines, metal lines, contact holes, and implant layers, using any type of patterning material.